1. Field of the Invention
The present invention relates to an electronic circuit, such as a pulse generator circuit, suitable for use as a metal-oxide-semiconductor integrated circuit and, particularly, a compensation circuit for stabilizing the operation of the electronic circuit, so that it is substantially insensitive to changes in ambient temperature and power supply voltage.
2. Description of the Prior Art
For the purpose of manufacturing small sized electronic calculators, using metal oxide semiconductor integrated circuits, improvements in the incorporation of all of the circuit elements necessary for the calculator into a single semiconductor chip have been effected.
To this end in one type of clock pulse generator circuit which is suitable for a MOSIC, there may be employed the closed-loop connected three inverter circuit having two capacitors between the inverters, as described in United States patent application Ser. No. 433,483, filed Jan. 15, 1974, by S. Shimada et al., and assigned to the assignee of the present application.
The oscillating period of this circuit, however, is unstable due to changes in the ambient temperature and power supply voltage. Moreover, when the circuit is employed in a MOSIC, the oscillating period varies over a wide range due to the differences in the electrical characteristics among the various MOSICs.
To compensate against this instability of the oscillating period of a MOSIC pulse generator, due to changes in ambient conditions and to compensate for the differences in the oscillating periods among mass-produced pulse generators produced in MOSIC form, there may be employed the compensation circuit described in U.S. patent application Ser. No. 453,168, filed on Mar. 20, 1974, now U.S. Pat. No. 3,975,649, by Kawagoe et al., also assigned to the assignee of the present application. As is shown in FIG. 1, this compensation circuit comprises a high resistance 4, one end of which is connected to a power supply terminal -V.sub.GG, an enhancement type MOSFET 5 and a depletion type MOSFET 6 connected in parallel with MOSFET 5. The drain electrodes of MOSFETs 5 and 6 are connected together to the other end of the high resistance 4, while the source electrodes thereof are grounded. The gate electrode of MOSFET 5 is connected to the above-mentioned power supply terminal, while the gate electrode of MOSFET 6 is grounded.
The connection point of the other end of resistance 4 with the drain electrodes of MOSFETs 5 and 6 is connected to the gate of a depletion type MOSFET 1, which operates as a load for inverter MOSFET 2.
The resistance 4 should have a temperature coefficient which is much smaller than the temperature coefficient of MOSFETs 1 and 3. For the resistance 4, a resistor of a high, constant or linear resistance which is manufactured separately from the MOSIC may be employed.
Now, when the ambient temperature of the circuit increases, current flowing to the MOSFET 1 will decrease, since the mutual conductance gm of MOSFET 1 decreases. Similarly, the current flowing through MOSFETs 5 and 6 also decreases, resulting in a decrease in the voltage drop across the resistance 4. Namely, the voltage V between ground and the gate electrode 1 of MOSFET 1 will increase. This increased gate voltage V increases the current flowing through the MOSFET 1, so that changes in the electrical characteristics in the inverter circuit including MOSFETs 1 and 2, due to the change in the ambient temperature of the circuit, are compensated.
On the other hand, upon a decrease in the power supply voltage -V.sub.GG, the voltage V between the gate of MOSFET 1 and ground will also increase. Moreover, the voltage applied to the gate of MOSFET 5 will necessarily increase, resulting in an increase in the current flowing through resistor 4, thereby increasing the voltage drop thereacross, so as to cause the voltage V to decrease, thereby balancing the voltage V irrespective of the change of the power supply voltage.
Furthermore, when MOSFETs 1 and 6 or MOSFETs 2 and 5 are manufactured in the same semiconductor chip under the same conditions, differences in the electrical characteristics are compensated among the mass-produced MOSICs. For example, for a high threshold voltage V.sub.th of MOSFET 1 within the MOSICs, the threshold voltage of V.sub.th of MOSFET 6 will also become high, which means that the current which flows to the MOSFET 6 will be relatively small. Thus, the voltage V will increase. As a result, the decrease of the current flowing through the MOSFET 1 due to its high threshold voltage V.sub.th is compensated by an increase in the bias voltage V. Thus, the compensation means will compensate for changes in the electrical characteristics among the various MOSICs. As a result, one can expect instability in the oscillating periods of the clock pulse generator circuits employing such compensation circuitry to be compensated.
In general, as shown in FIG. 3, the larger the voltage which is applied into the gate electrode of a MOSFET, then the smaller is the variation in the drain current. As a result, for the circuit shown in FIG. 1, since the gate electrode of MOSFET 5 is connected to a high voltage source -V.sub.GG, the variation in the drain current of MOSFET 5 due to changes in the power supply voltage is small. Thus, the expected compensation against changes in the voltage V is not satisfactory.
Furthermore, since the bias voltage which is applied to the gate electrode of MOSFET 5 is larger than that which is applied to MOSFET 6, the drain current of MOSFET 6 will be less than that of MOSFET 5. As a result, the compensation function provided by MOSFET 6 will be less effective.
Also, since the bias voltage which is applied to the gate electrode of MOSFET 5 is large, the drain current through MOSFET 5 will be large, resulting in a large power consumption in high resistance 4.